/*
 * Instance header file for PIC32CX1025SG41128
 *
 * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *   http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 */

/* file generated from device description file (ATDF) version 2023-03-17T09:48:34Z */
#ifndef _PIC32CXSG41_EVSYS_INSTANCE_
#define _PIC32CXSG41_EVSYS_INSTANCE_


/* ========== Instance Parameter definitions for EVSYS peripheral ========== */
#define EVSYS_ASYNCHRONOUS_CHANNELS              (0xFFFFF000) /* Mask of Only Asynchronous Channels */
#define EVSYS_CHANNELS                           (32)       /* Total Number of Channels */
#define EVSYS_CHANNELS_BITS                      (5)        /* Number of bits to select Channel */
#define EVSYS_EXTEVT_NUM                         (0)        /* Number of External Event Generators */
#define EVSYS_GCLK_ID_0                          (11)       /* Index of Generic Clock 0 */
#define EVSYS_GCLK_ID_1                          (12)       /* Index of Generic Clock 1 */
#define EVSYS_GCLK_ID_10                         (21)       /* Index of Generic Clock 10 */
#define EVSYS_GCLK_ID_11                         (22)       /* Index of Generic Clock 11 */
#define EVSYS_GCLK_ID_2                          (13)       /* Index of Generic Clock 2 */
#define EVSYS_GCLK_ID_3                          (14)       /* Index of Generic Clock 3 */
#define EVSYS_GCLK_ID_4                          (15)       /* Index of Generic Clock 4 */
#define EVSYS_GCLK_ID_5                          (16)       /* Index of Generic Clock 5 */
#define EVSYS_GCLK_ID_6                          (17)       /* Index of Generic Clock 6 */
#define EVSYS_GCLK_ID_7                          (18)       /* Index of Generic Clock 7 */
#define EVSYS_GCLK_ID_8                          (19)       /* Index of Generic Clock 8 */
#define EVSYS_GCLK_ID_9                          (20)       /* Index of Generic Clock 9 */
#define EVSYS_GENERATORS                         (119)      /* Total Number of Event Generators */
#define EVSYS_GENERATORS_BITS                    (7)        /* Number of bits to select Event Generator */
#define EVSYS_INSTANCE_ID                        (39)       /* Instance index for EVSYS */
#define EVSYS_SYNCH_NUM                          (12)       /* Number of Synchronous Channels */
#define EVSYS_SYNCH_NUM_BITS                     (4)        /* Number of bits to select Synchronous Channels */
#define EVSYS_USERS                              (67)       /* Total Number of Event Users */
#define EVSYS_USERS_BITS                         (7)        /* Number of bits to select Event User */

#endif /* _PIC32CXSG41_EVSYS_INSTANCE_ */
