/*
 * Instance header file for PIC32CX1025SG41128
 *
 * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *   http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 */

/* file generated from device description file (ATDF) version 2023-03-17T09:48:34Z */
#ifndef _PIC32CXSG41_ADC1_INSTANCE_
#define _PIC32CXSG41_ADC1_INSTANCE_


/* ========== Instance Parameter definitions for ADC1 peripheral ========== */
#define ADC1_BANDGAP                             (27)       /* MUXPOS value to select BANDGAP */
#define ADC1_DMAC_ID_RESRDY                      (70)       /* Index of DMA RESRDY trigger */
#define ADC1_DMAC_ID_SEQ                         (71)       /* Index of DMA SEQ trigger */
#define ADC1_EXTCHANNEL_MSB                      (15)       /* Number of external channels */
#define ADC1_GCLK_ID                             (41)       /* Index of Generic Clock */
#define ADC1_INSTANCE_ID                         (104)      /* Instance index for ADC1 */
#define ADC1_MASTER_SLAVE_MODE                   (2)        /* ADC Master/Slave Mode */
#define ADC1_OPAMP01                             (0)        /* MUXPOS value to select OPAMP01 */
#define ADC1_OPAMP2                              (0)        /* MUXPOS value to select OPAMP2 */
#define ADC1_TOUCH_IMPLEMENTED                   (0)        /* TOUCH implemented or not */
#define ADC1_TOUCH_LINES_NUM                     (1)        /* Number of touch lines */

#endif /* _PIC32CXSG41_ADC1_INSTANCE_ */
